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JEDEC JESD 24-9 (R2002) PDF Download

$31.00

ADDENDUM No. 9 to JESD24 – SHORT CIRCUIT WITHSTAND TIME TEST METHOD
Amendment by JEDEC Solid State Technology Association, 08/01/1992

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Description

Test method to determine how long a device can survive a short circuit condition with a given drive level.

Product Details

Published:
08/01/1992
Number of Pages:
10
File Size:
1 file , 130 KB